JPS58103253A - 通信制御装置 - Google Patents

通信制御装置

Info

Publication number
JPS58103253A
JPS58103253A JP56200913A JP20091381A JPS58103253A JP S58103253 A JPS58103253 A JP S58103253A JP 56200913 A JP56200913 A JP 56200913A JP 20091381 A JP20091381 A JP 20091381A JP S58103253 A JPS58103253 A JP S58103253A
Authority
JP
Japan
Prior art keywords
circuit
program
line
clock
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56200913A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6350903B2 (en]
Inventor
Toshihiko Hiraide
平出 利彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56200913A priority Critical patent/JPS58103253A/ja
Publication of JPS58103253A publication Critical patent/JPS58103253A/ja
Publication of JPS6350903B2 publication Critical patent/JPS6350903B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
  • Communication Control (AREA)
JP56200913A 1981-12-15 1981-12-15 通信制御装置 Granted JPS58103253A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56200913A JPS58103253A (ja) 1981-12-15 1981-12-15 通信制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56200913A JPS58103253A (ja) 1981-12-15 1981-12-15 通信制御装置

Publications (2)

Publication Number Publication Date
JPS58103253A true JPS58103253A (ja) 1983-06-20
JPS6350903B2 JPS6350903B2 (en]) 1988-10-12

Family

ID=16432351

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56200913A Granted JPS58103253A (ja) 1981-12-15 1981-12-15 通信制御装置

Country Status (1)

Country Link
JP (1) JPS58103253A (en])

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61296842A (ja) * 1985-06-25 1986-12-27 Fujitsu Ltd 回線制御方式

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0342806U (en]) * 1989-08-31 1991-04-23

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61296842A (ja) * 1985-06-25 1986-12-27 Fujitsu Ltd 回線制御方式

Also Published As

Publication number Publication date
JPS6350903B2 (en]) 1988-10-12

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